What is MIFARE Ultralight® C?
2023-10-31 View：
NXP® Semiconductors has developed the MIFARE Ultralight C - Contactless ticket IC MF0ICU2 to be used in a contactless smart ticket or smart card in combination with Proximity Coupling Devices (PCD). The communication layer (MIFARE® RF Interface) complies to parts 2 and 3 of the ISO/IEC 14443 Type-A standard. The MF0ICU2 is primarily designed for limited use applications such as public transport, event ticketing, and loyalty applications.
Contactless energy and data transfer
In the MIFARE system, the MF0ICU2 is connected to a coil with a few turns. The MF0ICU2 fits for the TFC.0 (Edmonson) and TFC.1 ticket formats as defined in EN 753-2.
TFC.1 ticket formats are supported by the MF0xxU20 chip featuring an on-chip resonance capacitor of 16 pF.
The smaller TFC.0 tickets are supported by the MFxxU21 chip holding an on-chip resonance capacitor of 50 pF.
When the ticket is positioned in the proximity of the coupling device (PCD) antenna, the high-speed RF communication interface allows the transmission of the data with a baud rate of 106 kbit/s.
Anti-collision
An intelligent anti-collision function allows operating more than one card in the field simultaneously. The anti-collision algorithm selects each card individually and ensures that the execution of a transaction with a selected card is performed correctly without interference from another card in the field.
The anti-collision function is based on an IC individual serial number called Unique IDentification. The UID of the MF0ICU2 is 7 bytes long and supports cascade level 2 according to ISO/IEC 14443-3.
Security
- 3DES Authentication
- Anti-cloning support by unique 7-byte serial number for each device
- 32-bit user programmable OTP area
- Field programmable read-only locking function per page for first 512-bit
- Read-only locking per block for the memory above 512 bit
Features
MIFARE RF Interface (ISO/IEC 14443 A)
- Contactless transmission of data and supply energy
- Operating frequency of 13.56 MHz
- Data integrity of 16-bit CRC, parity, bit coding, bit counting
- 7-byte serial number (cascade level 2 according to ISO/IEC 14443-3)
- Fast counter transaction: < 10 ms
- Operating distance up to 100 mm depending on antenna geometry and reader configuration
- Data transfer of 106 kbit/s
- True anti-collision
- Typical ticketing transaction: < 35 ms
EEPROM
- 1536-bit total memory
- 36 pages, 1152-bit user r/w area
- Field programmable read-only locking function per page for first 512-bit
- 32-bit user definable One-Time Programmable (OTP) area
- Data retention of 10 years
- 512-bit compatible with MF0ICU1
- Field programmable read-only locking function per block
- 16-bit one-way counter
- Write endurance 100000 cycles
